1. Field of the Invention
The present invention relates to a fabrication method of a nonvolatile memory, and in particular to a fabrication method of a split gate flash memory with a sharp corner profile.
2. Description of the Related Art
Nonvolatile memory devices comprise EPROM, TV-erasable EPROM, EEPROM, flash memory, or one-time-programmable EPROM.
Gates for a flash memory typically comprise a stack gate or a split gate. A typical stack gate comprises a substrate with a tunneling oxide layer thereon, a polysilicon layer (poly 1) as a floating gate, an ONO (oxide-nitride-oxide) stack, and a polysilicon layer (poly 2) as a control gate formed in sequence. As to a split gate, a polysilicon layer (poly 3) as an erase gate is formed adjacent to one side of the described stack gate.
The split gate flash memory can be erased by Fowler-Nordheim tunneling of electrons from its floating gate through the underlying gate oxide layer to the substrate region, i.e. channel regions, but “over erasure” is likely to happen. The split gate flash memory can also be erased by Fowler-Nordheim tunneling of electrons between gates, namely by Fowler-Nordheim tunneling of electrons from the floating gate (poly 1) to the erase gate (poly 3). However, efficiency of such method of erasure is low.
Accordingly, a flash memory capable of improving erasure efficiency and avoiding over erasure is desirable.